In recent years, semiconductor devices have been under high integration. When a plurality of highly-integrated semiconductor devices is arranged in a horizontal plane and are connected by wirings for final fabrication, there are problems of increase in wiring length, wiring resistance and wiring delay.
Under the circumstances, there has been proposed a three-dimensional integration technique for stacking semiconductor devices in three dimensions. This three-dimensional integration technique uses a bonding system to bond two semiconductor wafers (hereinafter abbreviated as “wafers”) together. For example, the bonding system includes a surface modifying device (surface activating device) for modifying bonding surfaces of the wafers, a surface hydrophilizing device for hydrophilizing the surfaces of the wafers modified by the surface modifying device and a bonding device for bonding the wafers having the surfaces hydrophilized by the surface hydrophilizing device. In this bonding system, the surface modifying device modifies the wafer surfaces by plasma-processing the wafer surfaces and the surface hydrophilizing device hydrophilizes the wafer surfaces by supplying pure water onto the wafer surfaces. Then, the bonding device bonds the wafers using a Van der Waals force and hydrogen bonding (an inter-molecular force).
The bonding apparatus includes an upper chuck configured to hold one wafer (hereinafter referred to as an “upper wafer”) on a lower surface thereof, a lower chuck installed below the upper chuck and configured to hold another wafer (hereinafter referred to as a “lower wafer”) on an upper surface thereof, and a pressing member installed in the upper chuck and configured to press a central portion of the upper wafer. In this bonding apparatus, the upper wafer held by the upper chuck and the lower wafer held by the lower chuck are disposed to face each other. In this state, the central portion of the upper wafer is pressed by the pressing member to bring the central portion of the upper wafer into contact with a central portion of the lower wafer. Thereafter, in the state in which the central portion of the upper wafer and the central portion of the lower wafer make contact with each other, the upper wafer and the lower wafer are bonded sequentially from the central portion of the upper wafer toward the outer peripheral portion thereof.
However, in such a method, the central portion of the upper wafer is moved down toward the central portion of the lower wafer by the pressing member, while holding the outer peripheral portion of the upper wafer by the upper chuck. Thus, the upper wafer is warped and stretched in a downwardly convex shape. In this case, when bonding the wafers to each other, the upper wafer and the lower wafer may sometimes be bonded in a horizontally shifted state. For example, even if the central portion of the upper wafer and the central portion of the lower wafer are aligned with each other in the bonded wafer (hereinafter referred to as an “overlapped wafer”), a horizontal position deviation (scaling) is generated in the outer peripheral portions of the upper wafer and the lower wafer.
In order to suppress deterioration of the scaling, the present inventors have conceived that the lower wafer is expanded by adjusting a temperature thereof prior to holding the lower wafer with the lower chuck. That is to say, even if the upper wafer is warped and stretched in the downwardly convex shape by the pressing member, no problem is generated if the lower wafer is expanded just as much as the stretched amount of the upper wafer. In this case, when bonding the upper wafer and the lower wafer, diameters of the upper wafer and the lower wafer become equal to each other. It is therefore possible to suppress the horizontal position deviation of the outer peripheral portions.
In an effort to verify the effect of the scaling countermeasure, the present inventors have inspected an actually-bonded overlapped wafer using an inspection device separately installed outside the bonding apparatus. However, the inspection has shown that the scaling still occurs and the overlapped wafer is wasted. This results in deterioration in the product yield. Furthermore, if the inspection is performed by the inspection device installed outside the bonding apparatus, the inspection is time-consuming and costly. Accordingly, there is room for improvement in the conventional wafer bonding process.